Embedded

Embedded system: Circuit, MCU, and PCB

Computer

Computer project: High-level programming

ESP-32 TCP Baremetal HTTP server

This article demonstrates how to use the low-level TCP/IP socket to build a HTTP server for static or fixed-length response and minimum HTTP response header on ESP-32 in ESP-IDF, without using the HTTP library. It also discusses how lwIP works for TCP/IP network socket send, shutdown and close.

RP2040 UART in Baremetal

In this article, we will discuss how to use the UART on RP2040 in a bare metal application.

Compare RP2040 Executable Memory Regions and Load Program From Flash into SRAM

Compare RP2040 executable memory regions (flash XIP space, striped SRAM and banked SRAM). Discuss memory strategies, data hazard and structural hazard. Load program from flash into SRAM then execute from SRAM.

Switch RP2040 Clock Source in Baremetal: ROSC, XOSC and PLL

Compare the RP2040 clock sources, switch the clock source in bare metal.

RP2040 Baremetal Dual-core Application and Core 1 Launch Protocol

Analysis the RP2040 Core 1 launch protocol. Launch core 1 in bare metal multi-processor application with minimum code.

W25Q Flash and RP2040 SDK Bootloader in Baremetal

Analysis the W25Q flash memory communication and the RP2040 SDK 2nd stage bootloader in disassembled code from the perspective of an 8-bit MCU developer's view.

Recent Updates

ESP-32 TCP Baremetal HTTP server

This article demonstrates how to use the low-level TCP/IP socket to build a HTTP server for static or fixed-length response and minimum HTTP response header on ESP-32 in ESP-IDF, without using the HTTP library. It also discusses how lwIP works for TCP/IP network socket send, shutdown and close.

RP2040 UART in Baremetal

In this article, we will discuss how to use the UART on RP2040 in a bare metal application.

Compare RP2040 Executable Memory Regions and Load Program From Flash into SRAM

Compare RP2040 executable memory regions (flash XIP space, striped SRAM and banked SRAM). Discuss memory strategies, data hazard and structural hazard. Load program from flash into SRAM then execute from SRAM.

Switch RP2040 Clock Source in Baremetal: ROSC, XOSC and PLL

Compare the RP2040 clock sources, switch the clock source in bare metal.

RP2040 Baremetal Dual-core Application and Core 1 Launch Protocol

Analysis the RP2040 Core 1 launch protocol. Launch core 1 in bare metal multi-processor application with minimum code.

W25Q Flash and RP2040 SDK Bootloader in Baremetal

Analysis the W25Q flash memory communication and the RP2040 SDK 2nd stage bootloader in disassembled code from the perspective of an 8-bit MCU developer's view.

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